{
    "identifier": "ark:\/88434\/mds2-3610",
    "accessLevel": "public",
    "contactPoint": {
        "hasEmail": "mailto:[email protected]",
        "fn": "Raegan Johnson"
    },
    "programCode": [
        "006:045"
    ],
    "landingPage": "https:\/\/data.nist.gov\/od\/id\/mds2-3610",
    "title": "Leakage Current Pathways in Josephson Arbitrary Waveform Synthesizer Standards Data shown in CPEM 2024 Extended Paper",
    "description": "Dataset for multiple publishable figures in the paper entitled \"Leakage Current Pathways in Josephson Arbitrary Waveform Synthesizer Standards\"to be submitted to CPEM 2024 Extended Paper (IEEE Transactions on Instrumentation and Measurement). The voltage errors associated with leakage currents in Josephson arbitrary waveform synthesizer (JAWS) systems are significant contributors to the overall system accuracy. This paper describes discrepancies in output voltage between two different circuit halves on a single JAWS chip and shows that this discrepancy is dominated by ac leakage currents through the stray capacitance in the compensation leads.",
    "language": [
        "en"
    ],
    "distribution": [
        {
            "downloadURL": "https:\/\/data.nist.gov\/od\/ds\/mds2-3610\/Fig3.csv",
            "format": "csv",
            "description": "Fig 3 - Voltage output difference, delta, between JAWS A and JAWS B using a standard D-sub cable for the room temperature compensation wiring and a D-sub cable with larger capacitance (?shielded? cable).",
            "mediaType": "text\/csv",
            "title": "Fig3"
        },
        {
            "downloadURL": "https:\/\/data.nist.gov\/od\/ds\/mds2-3610\/Fig4b.csv",
            "format": "csv",
            "description": "Fig 4 - The difference in measured output voltage, delta, between JAWS A and JAWS B when the system was operating in zero-compensation mode and the compensation electrical components were systematically removed.",
            "mediaType": "text\/csv",
            "title": "Fig4"
        },
        {
            "downloadURL": "https:\/\/data.nist.gov\/od\/ds\/mds2-3610\/Fig6b.csv",
            "format": "csv",
            "description": "Fig 6b - ac-ac difference between JAWS A and JAWS B output voltages (delta) for leakage current pathways described in Fig 5.",
            "mediaType": "text\/csv",
            "title": "Fig6b"
        },
        {
            "downloadURL": "https:\/\/data.nist.gov\/od\/ds\/mds2-3610\/Fig7.csv",
            "format": "csv",
            "description": "Fig 7 - The measured leakage current across a 10 Ohm sense resistor placed on the low of the JAWS output.",
            "mediaType": "text\/csv",
            "title": "Fig7"
        },
        {
            "downloadURL": "https:\/\/data.nist.gov\/od\/ds\/mds2-3610\/Fig2_edit.csv",
            "format": "csv",
            "description": "Description of Fig2",
            "mediaType": "text\/csv",
            "title": "Fig2"
        },
        {
            "downloadURL": "https:\/\/data.nist.gov\/od\/ds\/mds2-3610\/3610_README_v2.txt",
            "format": "txt",
            "description": "Description file for all figures",
            "mediaType": "text\/plain",
            "title": "Readmefile"
        }
    ],
    "bureauCode": [
        "006:55"
    ],
    "modified": "2024-10-21 00:00:00",
    "publisher": {
        "@type": "org:Organization",
        "name": "National Institute of Standards and Technology"
    },
    "theme": [
        "Electronics:Superconducting electronics"
    ],
    "keyword": [
        "Leakage currents",
        "Measurement uncertainty",
        "Josephson junctions",
        "Standards",
        "Superconducting integrated circuits",
        "Voltage measurement."
    ]
}